Wednesday, August 20, 2014
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PWM Controller Circuit using SN75603 and SN75604
Here the schema diagram of PWM Controller which uses complementary half-H peripheral drivers SN75603 and SN75604, with totem-pole outputs rated at 40 V and 2.0 A. These drivers effectively place the motor in a full-bridge configuration, which has the ability to provide bidirectional control.
Timer U1 operates in the astable mode at a frequency of 80 Hz. The 100-Ω discharge resistor results in an 8-μs trigger pulse which is coupled to the trigger input of timer U2. Timer U2 serves as the PWM generator. Capacitor C1 is charged linearly with a constant current of 1 mA from the 1N5297, which is an FET current-regulator diode. Motor speed is controlled by feeding a dc voltage of 0 to 10 V to control input pin 5 of U2. As the control voltage increases, the width of the output pulse pin 3 also increases. These pulses control the on/off time of the two motor drivers. The trigger pulse width of timer U1 limits the minimum possible duty cycle from U2.
PWM Controller Circuit using SN75603 and SN75604
Here the schema diagram of PWM Controller which uses complementary half-H peripheral drivers SN75603 and SN75604, with totem-pole outputs rated at 40 V and 2.0 A. These drivers effectively place the motor in a full-bridge configuration, which has the ability to provide bidirectional control.
Timer U1 operates in the astable mode at a frequency of 80 Hz. The 100-Ω discharge resistor results in an 8-μs trigger pulse which is coupled to the trigger input of timer U2. Timer U2 serves as the PWM generator. Capacitor C1 is charged linearly with a constant current of 1 mA from the 1N5297, which is an FET current-regulator diode. Motor speed is controlled by feeding a dc voltage of 0 to 10 V to control input pin 5 of U2. As the control voltage increases, the width of the output pulse pin 3 also increases. These pulses control the on/off time of the two motor drivers. The trigger pulse width of timer U1 limits the minimum possible duty cycle from U2.
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